hw: Minor fix for verilator compilation #49
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| if (NumVirtChannels == NumPhysChannels) begin : gen_virt_eq_phys | ||
| assign valid_o = valid_i; | ||
| assign ready_o = ready_i; | ||
| assign data_o = data_i; | ||
| end else if (NumPhysChannels == 1) begin : gen_single_phys |
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[verible-verilog-format] reported by reviewdog 🐶
Suggested change
| if (NumVirtChannels == NumPhysChannels) begin : gen_virt_eq_phys | |
| assign valid_o = valid_i; | |
| assign ready_o = ready_i; | |
| assign data_o = data_i; | |
| end else if (NumPhysChannels == 1) begin : gen_single_phys | |
| if (NumVirtChannels == NumPhysChannels) begin : gen_virt_eq_phys | |
| assign valid_o = valid_i; | |
| assign ready_o = ready_i; | |
| assign data_o = data_i; | |
| end else if (NumPhysChannels == 1) begin : gen_single_phys |
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Fixes a typedef in
floo_vc_arbiterwhen settingNumVirtChannelsto 1, that caused issue when compiling with Verilator.